用Verilog HDL设计数字电路过程中的两个问题

Journal of Shenyang University of Technology ›› 2005, Vol. 27 ›› Issue (5) : 562-566.
信息科学与工程

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +
History +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}

Accesses

Citation

Detail
Sections
Recommended

/

〈 〉